hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 1 pd0 = open pd1 = open pd2 = open pd3 = vss pin assignment nc nc pd2 pd3 vss pd0 pd1 dq0 dq8 dq1 dq9 dq2 dq10 dq3 dq11 vcc a0 a7 a1 a8 a2 a9 dq12 dq4 dq13 dq5 dq14 dq6 dq15 dq7 vss /we a15 a14 /ce2 /ce1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 /ce4 /ce3 a17 a16 /oe vss dq24 dq16 dq25 dq17 dq26 dq18 dq27 dq19 a3 a10 a4 a11 a5 a12 vcc a13 a6 dq20 dq28 dq21 dq29 dq22 dq30 dq23 dq31 vss a18 nc nc nc 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 72-pin simm top view general description the hms51232m4v/z4v is a high-speed static ra ndom access memory (sram) module containing 524,288 words organized in a x32-bit configuration. the module consists of four 512k x 8 srams mounted on a 72-pin, single-sided, fr4-printed circuit board. pd0 to pd3 identify the modules density allowing interchangeable use of alternate density, industry- standard modules. four chip enable inputs, (/ce1, /ce2, /ce3 and /ce4) are used to enable the modules 4 bytes independently. output enable(/oe) and write enable(/we) can set the memory input and output. data is written into the sram memory when write enable (/we) and chip enable (/ce) inputs are both low. reading is accomplished when /we remains high and /ce and output enable (/oe) are low. for reliability, this sram module is designed as multiple power and ground pin. all module components may be powered from a single +3.3v dc power supply and all inputs and outputs are fully lvttl-compatible. features ? access times : 10, 12 and 15ns ? high-density 2mbyte design ? high-reliability, high-speed design ? single + 3.3v 0.3v power supply ? easy memory expansion /ce and /oe functions ? all inputs and outputs are lvttl-compatible ? industry-standard pinout ? fr4-pcb design ? part identification - hms51232m4v: simm design - hms51232z4v: zip design ? pin-compatible with the hms51232m4v options marking ? timing 10ns access -10 12ns access -12 15ns access -15 ? packages 72-pin simm m 72-pin zip z sram module 2mbyte (512k x 32-bit), 3.3v part no. hms51232m4v, hms51232z4v h a n b i t
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 2 functional block diagram truth table mode /oe /ce /we dq power standby x h x high-z standby not selected h l h high-z active read l l h dout active write x l l din active pd0 = open pd1 = open pd2 = open pd3 = vss a0-18 / we / oe d q 0-7 / ce u1 a0-18 / we / oe d q 16-23 / ce u3 a0-18 / we / oe d q 24-31 / ce u4 19 a0-18 / we / oe d q 8-15 / ce u2 dq0 - dq31 a0 - a18 /ce1 /ce2 /ce3 /we /oe /ce4 32
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 3 absolute maximum ratings parameter symbol rating voltage on any pin relative to vss v in,out -0.5v to +4.6v voltage on vcc supply relative to vss v cc -0.5v to +4.6v power dissipation p d 4w storage temperature t stg -65 o c to +150 o c operating temperature t a 0 o c to +70 o c ? stresses greater than those listed under " absolute maximum ratings" may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions a bove those indicated in the operating section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. recommended dc operating conditions ( t a =0 to 70 o c ) parameter symbol min typ. max supply voltage v cc 3.0v 3.3v 3.6v ground v ss 00 0 input high voltage v ih 2.0 - vcc+0.3v** input low voltage v il -0.5* - 0.8v * v il (min.) = -2.0v (pulse width 10ns) for i 20 ma ** v ih (min.) = vcc+2.0v (pulse width 10ns) for i 20 ma dc and operating characteristics (1) (0 o c t a 70 o c ; vcc = 3.3v 0.3v, unless otherwise specified) parameter test conditions symbo l min max units input leakage current v in = vss to vcc il i -2 2 m a output leakage current /ce=v ih or / oe =v ih or /we=v il v out =vss to v cc il 0 -2 2 m a output high voltage i oh = -4.0ma v oh 2.4 v output low voltage i ol = 8.0ma v ol 0.4 v * vcc=3.3v, temp=25 o c dc and operating characteristics (2) max description test conditions symbol -10 -12 -15 unit power supply current:operating min. cycle, 100% duty /ce=v il , v in =v ih or v il , i out =0ma l cc 205 200 195 ma min. cycle, /ce=v ih l sb 50 50 50 ma power supply current:standby f=0mhz, /ce 3 v cc -0.2v, v in 3 v cc -0.2v or v in 0.2v l sb1 10 10 10 ma
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 4 capacitance description test conditions symbol max unit input /output capacitance v i/o =0v c i/o 8pf input capacitance v in =0v c in 7pf * note : capacitance is sampled and not 100% tested ac characteristics (0 o c t a 70 o c ; vcc = 3.3v 0.3v, unless otherwise specified) test conditions parameter value input pulse level 0 to 3v input rise and fall time 3ns input and output timing reference levels 1.5v output load see below read cycle -10 -12 -15 parameter symbol min max min max min max unit read cycle time t rc 10 - 12 - 15 - ns address access time t aa -10 - 12 - 15 ns chip select to output t co -10 - 12 - 15 ns output enable to output t oe -5-6-7ns chip enable to low-z output t lz 3-3-3-ns output enable to low-z output t olz 0 - 0 - 0 - ns chip disable to high-z output t hz 050607ns output disable to high-z output t ohz 0 5 0 6 0 7 ns +3.3v 319 w 353 w 5pf* d out output load (b) for t hz , t lz , t whz , t ow , t olz & t ohz v l =1.5v 50 w 30pf d out z0=50 w output load (a)
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 5 output hold from address change t oh 3-3-3-ns chip select to power up time t pu 0-0-0-ns chip select to power down time t pd -15 - 12 - 15 ns write cycle -10 -12 -15 parameter symbol min max min max min max unit write cycle time t wc 10 - 12 - 10 - ns chip select to end of write t cw 7-8-10-ns address set-up time t as 0-0-0-ns address valid to end of write t aw 7-8-10-ns write pulse width (/oe high) t wp 7-8-10-ns write pulse width (/oe low) t wp1 10 - 12 - 15 - ns write recovery time t wr 0-0-0-ns write to output high-z t whz 050607ns data to write time overlap t dw 5-6-7-ns data hold from write time t dh 0-0-0-ns end of write to output low-z t ow 3-3-3-ns timing diagrams see part no. hms51232m4/z4 functional description /ce /we /oe mode i/o pin supply current h x* x not select high-z i sb , i sb1 l h h output disable high-z i cc lhl read d out i cc l l x write d in i cc note: x means don't care
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 6 packaging information simm design (solder & gold plating lead) zip design 1.29 0.08 mm 2.54 1 72 108.20 mm 2.03 mm 1.02 mm 6.35 mm 1.27 mm 95.25 mm 3.34 mm 6.35 mm 3.18 mm t yp(2x) 16 mm 1.29 0.08mm 0.25 mm max min 2.54 mm 1.27 gold: 1.04 0.10 mm solder: 0.914 0.10 mm cut 1.5 mm 6 mm 1 72 19 mm 2.54 mm 46 mm 1 mm 97.79 mm 1 mm 96.5 mm
hanbit hms51232m4v/z4v hanbit electronics co.,ltd. 7 ordering information 1. - product line identifier hanbit ------------------------------------------------------- h 2. - memory modules 3. - sram 4. - depth : 512k 5. - width : x 32bit 6. - package code simm ------------------------------------------------------- m zip ------------------------------------------------------- z 7. - number of memory components 8. - v : 3.3v 9. - access time 10 ----------------------------------------------------------- 10ns 12 ----------------------------------------------------------- 12ns 15 ----------------------------------------------------------- 15ns 17 ----------------------------------------------------------- 17ns 20 ----------------------------------------------------------- 20ns sram x32bit 1 2 3 4 5 6 7 8 9 15ns access time h m s 512 32 m 4 v -15 hanbit memory modules simm 512k component 3.3v
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